On September 7 in Guangzhou, Huawei launched a tri-fold phone called the Mate XT 2 and did something it had not done at a flagship event since 2020. It named a new Kirin processor on stage and explained how the chip was built.
Naming it was the smaller change. Huawei had already identified last year’s tri-fold chip as the Kirin 9020. What it added this year was the method. The Kirin 9050 Pro is, in Huawei’s description, the first mobile system-on-chip built with what it calls LogicFolding, its logic laid out across two stacked tiers of silicon. Huawei’s own image is a building: take a single-storey floorplan, make it two storeys, add lifts. The lifts are not free. There are about 50 million of them, and only 10% to 15% carry signals.
The phone starts at Rmb 19,999, about $2,900, and goes on sale on September 12.
A new manufacturing method has arrived in a phone category that ships in the hundreds of thousands a year. Huawei remains the only source of density and performance measurements for the chip. It also arrives with a silicon bill. A folded chip draws die area from two bonded wafers rather than one, and about 30% more silicon per transistor. That arithmetic is the main thing standing between LogicFolding and a phone that ships in the millions.
Reading a density figure against the silicon it is actually measured on is one example of how Hello China Tech reads China’s tech sector: primary sources first, three analyses a week, across AI, chips, robotics, and EVs. Subscribe free to get the next one in your inbox.
What the density number counts
The case is made in a position paper by He Tingbo, who runs Huawei’s semiconductor business, published online in July by Science China Information Sciences. It went through peer review; its measurements have not been reproduced outside Huawei. Set against last year’s Kirin 9030 Pro, transistor density rose from 155 to 238 million transistors per square millimetre. Huawei calls that a 55% step; the two figures work out to 54%.
Both chips are built on the same mature process node. That clause matters more than the percentage. In this context “mature” appears to mean the foundry’s most advanced production line, not a legacy node. A density step that size usually means a better manufacturing generation, and Huawei says it did not get one. If that holds, the layout is what is left, and Huawei credits its three-dimensional reorganisation.
The 238 is measured against projected area. SemiAnalysis describes Huawei as measuring density per package footprint, with two tiers counted under each square millimetre. Counted against silicon consumed, assuming equal tiers, density falls by roughly a quarter.
Huawei has not named its foundry or its process. TechInsights, a chip teardown firm, identified last year’s Kirin 9030 as a product of SMIC’s most advanced line. No independent teardown of the new chip has been published. The paper never uses the retail name either, calling the chip Kirin 2026 throughout; matching that to the 9050 Pro named on stage is an inference.
Asked about the method in May, Jensen Huang told reporters in Taipei that it was “a breakthrough for Huawei, but it’s not a threat for TSMC,” noting that TSMC has stacked dies for close to a decade. Both halves hold. Stacking is old. Stacking two tiers of a phone processor’s logic and shipping it is not.
Huawei published the density gain and the engineering behind it. What it did not publish is the cost, and that number is what limits how far the method travels.